SC414/SC424
15
This method automatically produces an on-time that is
proportional to V
OUT
and inversely proportional to V
IN
.
Under steady-state conditions, the switching frequency
can be determined from the on-time by the following
equation.
IN
ON
OUT
SW
V
T
V
f
The SC414/SC424 uses an external resistor to set the on-
time which indirectly sets the frequency. The on-time can
be programmed to provide an operating frequency from
200kHz to 1MHz using a resistor between the TON pin and
ground. The resistor value is selected by the following
equation.
OUT
IN
SW
TON
V
V
400
f
pF
25
1
R
The maximum R
TON
value allowed is shown by the follow-
ing equation.
A
5
.
1
10
V
R
MIN
_
IN
MAX
_
TON
Immediately after the on-time, the DL (drive signal for the
low side FET) output drives high to turn on the low-side
MOSFET. DL has a minimum high time of ~320ns, after
which DL continues to stay high until one of the following
occurs:
VFB falls below the 750mV reference
The Zero Cross Detector senses that the voltage
on the LX node is below ground. Power Save is
activated when a zero crossing is detected.
TON limitations and V5V Supply Voltage
For V5V below 4.5V, the TON accuracy may be limited by
the input voltage.
The original RTON equation is accurate if V
IN
satisfi es the
below relation over the entire V
IN
range:
V
IN
< (V5V - 1.6V) x 10
If V
IN
exceeds (V5V - 1.6V) x 10, for all or part of the V
IN
range, the RTON equation is not accurate. In all cases
where V
IN
> (V5V - 1.6V) x 10, the RTON equation must be
modifi ed as follows.
"
"
OUT
SW
TON
V
10
1.6V)
(V5V
400
f
25pF
1
R
Note that when V
IN
> (V5V - 1.6V) x 10 , the actual on-time
is fi xed and does not vary with V
IN
. When operating in this
condition, the switching frequency will vary inversely with
V
IN
rather than approximating a fi xed frequency.
V
OUT
Voltage Selection
The switcher output voltage is regulated by comparing
V
OUT
as seen through a resistor divider at the FB pin to the
internal 750mV reference voltage (see Figure 3).
R
1
V
OUT
To FB pin
R
2
Figure 3 Output Voltage Selection
Note that this control method regulates the valley of the
output ripple voltage, not the DC value. The DC output
voltage V
OUT
is off set by the output ripple according to the
following equation.
2
V
R
R
1
75
.
0
V
RIPPLE
2
1
OUT
When a large capacitor is placed in parallel with R1 (C
TOP
)
V
OUT
is shown by the following equation.
2
TOP
1
2
1
2
2
TOP
1
RIPPLE
2
1
OUT
C
R
R
R
R
1
)
C
R
(
1
2
V
R
R
1
75
.
0
V
Where ?is the angular switching frequency.
Enable and Power-save Inputs
The EN/PSV and ENL inputs are used to enable or disable
the switching regulator and the LDO. When EN/PSV is low
(grounded), the switching regulator is off and in its lowest
power state. When off , the output of the switching regula-
tor soft-discharges the output into a 10?internal resistor
via the VOUT pin. When EN/PSV is allowed to fl oat, the pin
voltage will fl oat to 33% of the voltage at V5V. The switch-
ing regulator turns on with power-save disabled and all
switching is in forced continuous mode. For V5V < 4.5V, it
Applications Information (continued)
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